10AS032H2F34E2SG vs 10AS032H2F35E1HG 对比
详细并排对比 10AS032H2F34E2SG 出自 Altera 和 10AS032H2F35E1HG 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | 10AS032H2F34E2SG | 10AS032H2F35E1HG |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1,410.00 | $1,293.00 |
| Family | Arria 10 SX | — |
| Device | 10AS032 | — |
| Logic Elements | 320,000 | 320,000 |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Frequency | 1.5 GHz (max) | — |
| Process Technology | 20 nm | — |
| 封装 | 1152-pin FC-FBGA (F34), 35 x 35 mm | 1152-ball FCBGA (35 x 35 mm) |
| 安装类型 | Surface Mount, BGA | Surface Mount (Flip-Chip BGA) |
| RoHS 状态 | Compliant | Compliant [DATA_NEEDED: per specific PCN or compliance certificate] |
| Core Voltage | 0.9 V (typical) | — |
| 工作温度 | [DATA_NEEDED: operating temperature grade] | — |
| Logic Array Blocks | [DATA_NEEDED: LAB count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Transceivers | [DATA_NEEDED: transceiver count and rate] | — |
| Memory | Integrated DDR4 hard memory controller | — |
| Package Code | BGA | — |
| Package Shape | Square | — |
| Terminal Form | Ball | — |
| Terminal Count | 1152 | — |
| Device Family | — | Arria 10 SX SoC FPGA |
| Product Type | — | System-on-Chip (SoC) FPGA |
| User I/Os | — | 384 |
| Maximum Transceiver Data Rate | — | 1.5 GHz [DATA_NEEDED: actual Gbps line rate per protocol] |
| Operating Temperature Grade | — | Industrial (E1) |
| Process Node | — | 20 nm [DATA_NEEDED: exact process geometry per Intel datasheet] |
| Configuration | — | Serial (E1 suffix) |
| 电源电压 | — | [DATA_NEEDED: core/aux/HPS voltage rails per datasheet] |
| MSL 等级 | — | [DATA_NEEDED: MSL rating from JEDEC J-STD-020] |
| Hard Processor System | — | HPS with Cortex-A9 dual core, L1/L2 cache, peripherals |