10AS032H2F35E1HG vs 10AS032H2F35I2LG 对比
详细并排对比 10AS032H2F35E1HG 出自 Intel 和 10AS032H2F35I2LG 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | 10AS032H2F35E1HG | 10AS032H2F35I2LG |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1,293.00 | $1,295.00 |
| Device Family | Arria 10 SX SoC FPGA | — |
| Product Type | System-on-Chip (SoC) FPGA | — |
| Processor Core | Dual ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| Logic Elements | 320,000 | 320 K |
| User I/Os | 384 | — |
| Maximum Transceiver Data Rate | 1.5 GHz [DATA_NEEDED: actual Gbps line rate per protocol] | — |
| 封装 | 1152-ball FCBGA (35 x 35 mm) | 1152-FBGA, FC (Flip-Chip), 35x35 mm (F35) |
| Operating Temperature Grade | Industrial (E1) | Industrial (I2 suffix) |
| 安装类型 | Surface Mount (Flip-Chip BGA) | Surface Mount |
| Process Node | 20 nm [DATA_NEEDED: exact process geometry per Intel datasheet] | — |
| Configuration | Serial (E1 suffix) | — |
| 电源电压 | [DATA_NEEDED: core/aux/HPS voltage rails per datasheet] | — |
| RoHS 状态 | Compliant [DATA_NEEDED: per specific PCN or compliance certificate] | Compliant |
| MSL 等级 | [DATA_NEEDED: MSL rating from JEDEC J-STD-020] | [DATA_NEEDED: MSL Level] |
| Hard Processor System | HPS with Cortex-A9 dual core, L1/L2 cache, peripherals | — |
| Family | — | Arria 10 SX |
| Device Variant | — | 10AS032 (320K Logic Elements) |
| Architecture | — | SoC FPGA (FPGA + Hard Processor System) |
| Maximum Logic Performance | — | 1.5 GHz |
| Lead Free | — | Yes |
| Number of Terminals | — | 1152 (Ball) |
| Terminal Form | — | Ball |
| Package Code | — | BGA (FCBGA) |
| Process Technology | — | [DATA_NEEDED: Process Node] |