10AX090U3F45I2SG vs 10AX090U3F45E2LG 对比

详细并排对比 10AX090U3F45I2SG 出自 Altera 和 10AX090U3F45E2LG 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 10AX090U3F45I2SG 10AX090U3F45E2LG
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $7,450.00 $6,900.00
Family Arria 10 GX —
Logic Elements 900000 —
Embedded Memory Bits 59234304 59,234,304 bits
Number of User I/O 480 —
Process Technology 20nm 20nm TSMC
Core Voltage 0.9 V —
封装 1932-BBGA, FCBGA (F45) 1932-BBGA, FCBGA
Number of Terminals 1932 —
Terminal Form BALL —
Package Shape SQUARE —
Operating Temperature Grade INDUSTRIAL OTHER / Extended (per Partstack listing)
Transceivers Up to 28.05 Gbps —
DSP Blocks Variable-precision multipliers [DATA_NEEDED: DSP block count]
安装类型 Surface Mount (BGA) —
Compliance RoHS compliant per Altera product page —
Series — Arria 10 GX
Logic Elements (LE) — 900,000
Number of Logic Array Blocks (LABs) — [DATA_NEEDED: LAB count]
Number of Transceivers — 48 transceiver macro channels (480 I/O references)
Maximum Transceiver Data Rate — [DATA_NEEDED: exact Gbps]
Hard Memory Controllers — Yes - DDR4, DDR3, QDR IV, RLDRAM 3 with hardened PHY
Hard PCIe Controllers — PCIe Gen3 x8
Hard Ethernet MACs — 10GbE and 100GbE MACs
Adaptive Logic Modules (ALMs) — [DATA_NEEDED: ALM count]
Number of I/O Banks — [DATA_NEEDED: bank count]
Maximum User I/O Pins — 480 (per DigiKey listing)
Package Pin Pitch — [DATA_NEEDED: pitch]
Configuration Method — Serial (active/passive) and parallel via Quartus Prime
RoHS 状态 — Compliant
Development Tool — Intel Quartus Prime

数据手册与资源

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