10M50DAF256I7G vs 10M50DAF484I7P 对比

详细并排对比 10M50DAF256I7G 出自 Intel 和 10M50DAF484I7P 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 10M50DAF256I7G 10M50DAF484I7P
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $155.20 $112.00
Family MAX 10 —
Logic Elements (LE) 50,000 50,000
Adaptive Logic Modules (ALM) [DATA_NEEDED: ALM count] —
Embedded Memory (M9K bits) 1,677,312 —
DSP Blocks (18 x 18 multipliers) 4 —
Maximum User I/O 178 —
封装 256-LBGA (17 mm x 17 mm) 484-ball FineLine BGA (F484)
Configuration Memory Internal non-volatile flash (dual-boot) —
Integrated ADC 12-bit SAR, up to 17 analog inputs —
PLLs On-chip (4 typical for 10M50 family) 8 (general-purpose, fractional on selected devices)
Core Voltage 1.2 V —
工作温度 -40C to +100C (Industrial) -40C to +100C (Tj, industrial)
Process Technology TSMC 55 nm embedded flash —
安装类型 Surface Mount (BGA) —
Tray Quantity 90 per tray (typical for 256-BGA) —
RoHS 状态 Compliant Compliant
Configuration Mode Internal flash (instant-on) —
Product Family — MAX 10
Embedded Memory (bits) — 1,677,312
Embedded Memory Blocks — M9K (and M144K)
18x18 Multipliers — 312
User I/O Pins (max) — 360
Pitch — 1.0 mm
Process Node — 55 nm embedded flash (TSMC)
On-die Configuration Flash — Yes (non-volatile, instant-on)
On-die ADC — Dual 12-bit SAR, 1 MSPS, up to 16 analog inputs
Global Clock Networks — 20
Speed Grade — 7 (slowest industrial bin, highest margin)
Configuration Modes — Internal flash, JTAG, dual-boot image support

数据手册与资源

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