5CSXFC6C6U23C8N vs 5CSXFC6C6U23A7N 对比
详细并排对比 5CSXFC6C6U23C8N 出自 Intel 和 5CSXFC6C6U23A7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | 5CSXFC6C6U23C8N | 5CSXFC6C6U23A7N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $445.00 | $328.75 |
| Family | Cyclone V SX (SoC FPGA) | Cyclone V SX SoC FPGA |
| Series | Cyclone V SX | — |
| Architecture | MCU + FPGA (Hard Processor System + FPGA fabric) | — |
| Logic Elements | 110,000 | 110,000 |
| Process Technology | 28 nm low-power (TSMC) | TSMC 28 nm Low Power |
| Core Voltage | 1.1 V | 1.1 V |
| Hard Processor System (HPS) | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| Processor Maximum Frequency | 600 MHz | — |
| HPS L1 Cache | 32 KB instruction + 32 KB data per core | — |
| HPS L2 Cache | 512 KB shared | — |
| DSP Blocks | Variable-precision DSP (number not specified in retrieved data) | — |
| Embedded Memory | M10K blocks (total Kbits [DATA_NEEDED: total embedded memory Kbits]) | — |
| Transceivers | Up to 3.125 Gbps integrated transceivers | 6 (up to 3.125 Gbps) |
| Maximum User I/O | 145 user I/O (per DigChip summary; full count per package [DATA_NEEDED: package pinout max user I/O]) | 364 LVDS-capable pins |
| Memory Controller | Hard controller supporting DDR2, DDR3, LPDDR2 | — |
| 封装 | 672-pin UFBGA (UBGA), 23x23 mm | 672-pin UBGAFBGA (23 x 23 mm) |
| 安装类型 | Surface Mount (BGA) | Surface Mount (BGA) |
| 工作温度 | -40C to +100C (industrial grade, code C) | Automotive grade (per part number decode A) |
| MSL 等级 | 3 (per JEDEC J-STD-020, typical for large BGA) | [DATA_NEEDED: moisture sensitivity level] |
| RoHS 状态 | Compliant | Compliant (per Intel product page) |
| Lead-Free / Halogen-Free | Yes (lead-free BGA; halogen status [DATA_NEEDED: halogen-free yes/no]) | — |
| Speed Grade | C8 (commercial speed grade 8) | — |
| Lifecycle | Active (Cyclone V family in production) | — |
| Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Embedded Memory (M20K) | — | 5,140 Kbit |
| DSP Blocks (18x18) | — | 224 |
| Hard Memory Controller | — | DDR2 / DDR3 / LPDDR2 with ECC |
| HPS Clock Frequency | — | Up to 925 MHz (per Cyclone V device datasheet) |