5M1270ZF256C5N vs 5M160ZM68C5N 对比
详细并排对比 5M1270ZF256C5N 出自 Altera 和 5M160ZM68C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | 5M1270ZF256C5N | 5M160ZM68C5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $21.40 | $3.12 |
| Family | MAX V | MAX V CPLD |
| Series | 5M1270Z | 5M160Z |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macro Cells | 980 | — |
| Logic Elements (LE) | 1270 | — |
| User I/Os (Max) | 212 | — |
| Configuration Memory | 8 Kbits User Flash Memory (UFM), non-volatile | Non-volatile flash (instant-on, no boot PROM required) |
| Maximum Operating Frequency | 201.1 MHz | 118.3 MHz |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltages (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) | — |
| 封装 | 256-ball FBGA (FineLine BGA) | — |
| 安装类型 | Surface Mount | — |
| 工作温度 | 0 C to +85 C (Commercial) | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD max] | — |
| Internal Oscillator | Yes (on-chip, supports user logic) | Yes (on-chip) |
| Programming Interface | JTAG (IEEE 1149.1), ByteBlaster | JTAG (IEEE Std. 1149.1), in-system programmable |
| Process Node | 0.30 µm | — |
| RoHS 状态 | Compliant | Compliant |
| Macrocells | — | 128 |
| Logic Elements (typical) | — | 160 |
| Pin-to-Pin Logic Delay | — | 7.5 ns |
| Number of Logic Array Blocks (LABs) | — | 4 |
| User Flash Memory | — | 8 Kbits |
| Core Supply Voltage | — | 1.8 V |
| I/O Standards Supported | — | LVTTL, LVCMOS 1.5/1.8/2.5/3.3 V |
| Package Type | — | 68-ball Micro FineLine BGA (MBGA) |
| 工作温度范围 | — | 0C to +85C (commercial) |
| Lead-Free | — | Yes |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |