5M1270ZF324I5N vs 5M1270ZF256I5N 对比

详细并排对比 5M1270ZF324I5N 出自 Intel 和 5M1270ZF256I5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 5M1270ZF324I5N 5M1270ZF256I5N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $13.95 $7.55
Series MAX V —
Device Family 5M1270Z —
Number of Macrocells 980 —
Number of Logic Array Blocks (LABs) 16 —
User I/Os 271 —
Maximum Internal Frequency 212 MHz —
Pin-to-Pin Logic Delay (tPD) 6.2 ns —
Number of I/O Banks 8 —
Core Voltage (VCCINT) 1.8 V (1.71 V to 1.89 V) —
I/O Voltage Standards Supported 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (LVCMOS, LVTTL, SSTL) —
Programmable Logic Type In-System Programmable (ISP) flash-based CPLD —
Configuration Interface JTAG (IEEE 1149.1) —
On-Chip User Flash Memory 8 Kbits —
封装 324-pin FBGA (FineLine BGA), 19 mm 256-ball FBGA
安装类型 Surface Mount —
工作温度 -40 °C to +100 °C (TJ) -40C to +100C (Industrial)
Standby Current (typ, 25 °C) 40 µA —
RoHS Compliance Compliant —
Lead-Free Yes Yes
Product Type — CPLD (Complex Programmable Logic Device)
Family — MAX V
Macro Cells — 980
Maximum Operating Frequency — 201.1 MHz
Core Supply Voltage (VCCINT) — 1.8 V
I/O Bank Voltage (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V
User Flash Memory (UFM) — 8 Kbits
User I/O Pins (max) — 212
Configuration Memory — Non-volatile flash (instant-on)
Programming Interface — JTAG, Active Serial, Active Parallel
Process Technology — 0.18 um CMOS
Typical Quiescent Power — [DATA_NEEDED: typical quiescent power in mW]
Pin-to-Pin Delay (tPD) — [DATA_NEEDED: tPD in ns]
RoHS 状态 — Compliant

数据手册与资源

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