5M160ZM68C5N vs 5M160ZE64C5N 对比

详细并排对比 5M160ZM68C5N 出自 Altera 和 5M160ZE64C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 5M160ZM68C5N 5M160ZE64C5N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $3.12 $4.95
Family MAX V CPLD —
Series 5M160Z MAX V
Macrocells 128 128
Logic Elements (typical) 160 —
Maximum Operating Frequency 118.3 MHz —
Pin-to-Pin Logic Delay 7.5 ns —
Number of Logic Array Blocks (LABs) 4 —
User Flash Memory 8 Kbits 8 Kbits
Core Supply Voltage 1.8 V —
I/O Standards Supported LVTTL, LVCMOS 1.5/1.8/2.5/3.3 V —
Package Type 68-ball Micro FineLine BGA (MBGA) —
工作温度范围 0C to +85C (commercial) —
Programming Interface JTAG (IEEE Std. 1149.1), in-system programmable JTAG (IEEE 1149.1) / In-system
Configuration Memory Non-volatile flash (instant-on, no boot PROM required) Non-volatile Flash
Internal Oscillator Yes (on-chip) —
RoHS 状态 Compliant Compliant
Lead-Free Yes —
MSL 等级 [DATA_NEEDED: MSL level] 3
Device Family — MAX V (5M160Z)
Logic Elements (LE) — 160
User I/O Pins — 54
Maximum Operating Frequency (fMAX) — 118.3 MHz
Pin-to-Pin Logic Delay (tPD) — 1.4 ns (per datasheet)
Supply Voltage (VCCINT) — 1.8 V
I/O Bank Voltage (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V
封装 — 64-pin EQFP (E64) with exposed pad
安装类型 — Surface Mount
工作温度 — 0°C to +85°C (commercial)

数据手册与资源

浏览全部产品 创建 BOM 获取报价