5M160ZT100I5N vs 5M80ZT100I5N 对比

详细并排对比 5M160ZT100I5N 出自 Intel 和 5M80ZT100I5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 5M160ZT100I5N 5M80ZT100I5N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $4.10 $7.37
Family MAX V MAX V CPLD
Series 5M160Z —
Macro Cells 128 —
Logic Elements (LEs) 160 —
Number of I/O 79 (max user I/Os) —
Maximum Internal Frequency 118.3 MHz —
Pin-to-Pin Delay (tPD) 7.5 ns —
Core Voltage (VCCINT) 1.8 V —
I/O Voltage (VCCIO) 1.2 V to 3.3 V (multi-voltage LVCMOS/LVTTL) —
User Flash Memory 8 Kbits —
封装 100-pin TQFP (T100) TQFP-100 (100 pins, 0.5 mm pitch)
安装类型 Surface Mount Surface Mount
工作温度 -40 °C to +100 °C (industrial) —
Programmability In-system via JTAG (IEEE 1149.1) —
Configuration Memory Non-volatile (flash-backed EEPROM) Internal non-volatile flash (instant-on)
RoHS 状态 Compliant Compliant
Logic Elements (LE) — 80
Macrocells (approx.) — 160
User I/O Pins — 64
Pin-to-Pin Logic Delay (tPD) — 7.5 ns
Core Supply Voltage (VCCINT) — 1.71 V to 1.89 V (1.8 V typical)
I/O Supply Voltage (VCCIO) — 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V
Operating Temperature (Industrial) — -40 °C to +100 °C
UFM (User Flash Memory) — Up to 8 Kbits user-accessible
JTAG / ISP — IEEE 1149.1 boundary-scan + in-system programming
MSL 等级 — MSL3 (per JEDEC J-STD-020)

数据手册与资源

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