5M40ZE64A5N vs 5M40ZE64C4N 对比

详细并排对比 5M40ZE64A5N 出自 Intel 和 5M40ZE64C4N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 5M40ZE64A5N 5M40ZE64C4N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $2.18 $1.70
Series MAX V —
Device Family MAX V (5M40Z) —
Logic Elements (LE) 40 32
Logic Array Blocks (LAB) 2 (20 LEs each) —
Maximum User I/O 30 —
User Flash Memory 4 Kbit 4 Kbit
Pin-to-Pin Delay (tPD) 5 ns (commercial speed grade) —
Core Voltage (VCCINT) 1.8 V —
I/O Voltage (VCCIO) 1.2 V to 3.3 V (4 banks) —
工作温度范围 0 C to +85 C (commercial) —
封装 EQFP-64 (E64, 10x10 mm, 0.5 mm pitch) EQFP-64 (Plastic Enhanced QFP, 64 pins)
安装类型 Surface Mount Surface Mount
JTAG Support IEEE 1149.1 boundary-scan —
Configuration Method On-chip non-volatile flash (instant-on) —
RoHS 状态 Compliant (Pb-free) Compliant
MSL 等级 3 (168 hours) 3 (per JEDEC J-STD-020)
Family — MAX V
Pin-to-Pin Delay (tPD1) — 7.5 ns
Maximum Internal Frequency — 184 MHz
Number of I/O Pins — 30 (approx.)
Supply Voltage (VCCINT) — 1.8 V
I/O Bank Voltage — 1.8 V / 2.5 V / 3.3 V
Process Technology — 0.18 µm flash-based CMOS
Configuration Memory — Non-volatile flash (internal)
Programmable Pull-up Resistors — Yes (per-pin, internal)
Programming Interface — JTAG (IEEE 1149.1)
工作温度 — 0 °C to +85 °C (commercial)

数据手册与资源

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