5M40ZM64C4N vs 5M40ZM64C4 对比

详细并排对比 5M40ZM64C4N 出自 Altera 和 5M40ZM64C4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 5M40ZM64C4N 5M40ZM64C4
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $0.48 $3.85
Family MAX V MAX V
Logic Elements 40 —
Macro Cells 32 —
Number of I/O Pins 30 (max user I/O) —
Number of Logic Array Blocks 2 LABs (16 macrocells each) —
Core Voltage VCCINT 1.8 V (1.71 V to 1.89 V) —
I/O Voltage VCCIO 1.2 V to 3.3 V (multi-voltage) —
Maximum Internal Frequency 184.1 MHz —
Pin-to-Pin Logic Delay (tPD) 7.5 ns —
Propagation Delay (max) 7.5 ns —
工作温度 0 °C to +85 °C (commercial) 0 °C to +85 °C (Commercial, C4 speed grade)
封装 64-MBGA (Micro FineLine BGA), 4.5 x 4.5 mm 64-ball MBGA (Micro BGA), 0.5 mm pitch
安装类型 Surface Mount (BGA) —
Configuration Memory Flash (non-volatile, instant-on) —
Programming Interface JTAG (IEEE 1149.1) / ISP —
RoHS 状态 Compliant Compliant
MSL 等级 [DATA_NEEDED: MSL rating] —
Logic Elements (LEs) — 40
Macrocells — 32
Logic Array Blocks (LABs) — 2
Maximum User I/O Pins — 30 (52 device max)
Maximum Frequency (fMAX) — 184.1 MHz
Pin-to-Pin Propagation Delay (tPD) — 7.5 ns
Core Voltage (VCCINT) — 1.8 V (internal)
I/O Voltage (VCCIO) — 1.2 V to 3.3 V
Embedded Memory (UFM) — 8 Kbits
Programming — JTAG (IEEE 1149.1), internal flash non-volatile
Lead-Free — Yes

数据手册与资源

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