5M570ZM100C4N vs 5M570ZM100C5N 对比
详细并排对比 5M570ZM100C4N 出自 Altera 和 5M570ZM100C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | 5M570ZM100C4N | 5M570ZM100C5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $8.74 | $6.80 |
| Family | MAX V | — |
| Series | 5M570Z | 5M570Z |
| Macro Cells | 440 | — |
| Logic Elements (LEs) | 440 | — |
| Maximum Internal Frequency | 184.1 MHz | — |
| Pin-to-Pin Delay (tPD) | 9.0 ns | — |
| Core Voltage | 1.8 V | — |
| 工作温度 | 0 C to +85 C (commercial) | 0C to +85C (commercial) |
| 封装 | 100-ball MBGA (Micro BGA), tray | 100-ball MBGA (Micro FineLine BGA), 0.5 mm pitch |
| Configuration Memory | Non-volatile flash, instant-on | — |
| User Flash Memory | Yes (8 Kbits) | — |
| Programmable I/O Pins | [DATA_NEEDED: I/O pin count for M100 package] | — |
| I/O Standards | LVTTL, LVCMOS 1.5/1.8/2.5/3.3 V, PCI | — |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | JTAG / In-System Programming (Quartus II / Quartus Prime) |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| RoHS 状态 | Compliant | Compliant |
| Lead-Free | Yes | — |
| Product Family | — | MAX V CPLD |
| Logic Elements / Macro Cells | — | 440 |
| Maximum User I/O Pins | — | 74 |
| Maximum Operating Frequency (fMAX) | — | 118.3 MHz |
| Pin-to-Pin Logic Delay (tPD) | — | 9 ns (typical, per datasheet) |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User Flash Memory (UFM) | — | 8 Kbits |
| Configuration Memory Type | — | Non-volatile Flash |
| JTAG Support | — | IEEE 1149.1 boundary-scan + ISP |