A42MX16-1PLG84I vs A42MX24-2PLG84I 对比

详细并排对比 A42MX16-1PLG84I 出自 Microchip Technology 和 A42MX24-2PLG84I 出自 Microchip Technology。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Microchip Technology
A42MX16-1PLG84I A42MX16-1PLG84I - 24K Gate MX FPGA, 84-PLCC | Microchip

A42MX16-1PLG84I - 24K Gate MX FPGA, 84-PLCC | Microchip

A42MX16-1PLG84I ✓ 量产中
Microchip Technology
A42MX24-2PLG84I A42MX24-2PLG84I - 36K Gate Antifuse FPGA, 84-PLCC | Microchip

A42MX24-2PLG84I - 36K Gate Antifuse FPGA, 84-PLCC | Microchip

A42MX24-2PLG84I ✓ 量产中

规格对比

参数 A42MX16-1PLG84I A42MX24-2PLG84I
品牌 Microchip Technology Microchip Technology
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $1.00 $55.40
Family MX (Actel/Microsemi antifuse FPGA) MX (42MX)
System Gates 24000 36000 gates
Configurable Logic Blocks (CLBs) 608 —
Number of I/O 72 —
Speed Grade -1 -2
最大时钟频率 56.16 MHz —
CLB Combinatorial Delay (max) 4.000 ns —
电源电压 5.0 V —
Programming Technology Antifuse (one-time programmable) —
封装 84-LCC (J-Lead), PLCC-84 84-PLCC (J-Lead)
安装类型 Surface Mount Surface Mount
工作温度 -40C to +85C (Industrial, I suffix) -40C to +85C (Industrial)
Lead Free Yes —
RoHS 状态 Compliant Lead Free (per Kynix listing)
Configuration Non-volatile, no external configuration device No external boot device required
Logic Cells — 912 cells
User I/O — 72
Technology — 0.45 um antifuse
Core Architecture Voltage — 5.0 V
I/O Voltage Support — 3.3 V / 5.0 V mixed
Programmability — One-Time Programmable (antifuse)
Dedicated Decode Blocks — D-modules (wide-input AND, CPLD-like)
Packaging — Tray
Primary Applications — ASIC alternative, legacy PLD integration

数据手册与资源

浏览全部产品 创建 BOM 获取报价