A42MX24-2PLG84I vs A42MX16-2PLG84 对比
详细并排对比 A42MX24-2PLG84I 出自 Microchip Technology 和 A42MX16-2PLG84 出自 Microchip Technology。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Microchip Technology
A42MX24-2PLG84I - 36K Gate Antifuse FPGA, 84-PLCC | Microchip
A42MX24-2PLG84I ✓ 量产中规格对比
| 参数 | A42MX24-2PLG84I | A42MX16-2PLG84 |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $55.40 | $15.40 |
| Family | MX (42MX) | 42MX FPGA |
| System Gates | 36000 gates | 24000 gates |
| Logic Cells | 912 cells | — |
| User I/O | 72 | — |
| Technology | 0.45 um antifuse | — |
| Core Architecture Voltage | 5.0 V | — |
| I/O Voltage Support | 3.3 V / 5.0 V mixed | — |
| Speed Grade | -2 | -2 |
| Programmability | One-Time Programmable (antifuse) | — |
| 工作温度 | -40C to +85C (Industrial) | [DATA_NEEDED: operating temperature range] |
| 封装 | 84-PLCC (J-Lead) | 84-LCC (J-Lead) PLCC-84 |
| 安装类型 | Surface Mount | Surface Mount |
| Configuration | No external boot device required | — |
| Dedicated Decode Blocks | D-modules (wide-input AND, CPLD-like) | — |
| RoHS 状态 | Lead Free (per Kynix listing) | Lead Free |
| Packaging | Tray | — |
| Primary Applications | ASIC alternative, legacy PLD integration | — |
| Configurable Logic Blocks (CLBs) | — | 608 |
| Number of I/O | — | 72 |
| 最大时钟频率 | — | 117 MHz |
| Process Technology | — | 0.45 um CMOS |
| 电源电压 | — | 3.3 V / 5 V |
| JESD-30 Code | — | S-PQCC-J84 |
| Programmable Type | — | In-System Programmable |
| JTAG Support | — | IEEE 1149.1 (family members 42MX24/42MX36) |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |