ATSAMA5D27A-CUR vs ATSAMA5D27B-CU 对比
详细并排对比 ATSAMA5D27A-CUR 出自 Microchip Technology 和 ATSAMA5D27B-CU 出自 Microchip Technology。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Microchip Technology
ATSAMA5D27B-CU - 500MHz Cortex-A5 MPU 289-LFBGA | Microchip
ATSAMA5D27B-CU ✓ 量产中规格对比
| 参数 | ATSAMA5D27A-CUR | ATSAMA5D27B-CU |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 分类 | Microcontrollers | Microcontrollers |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $12.95 | $11.85 |
| Series | SAMA5D2 | SAMA5D2 |
| Core | ARM Cortex-A5 (1 core, 32-bit) | — |
| Maximum CPU Clock | 500 MHz | 500 MHz |
| 工作温度 | -40 C to +85 C (Industrial, MRLA marking) | — |
| Maximum Junction Temperature | 105 C | — |
| 封装 | 289-LFBGA (14x14 mm) | 289-LFBGA (14x14 mm) |
| Ball Pitch | 0.8 mm | 0.8 mm |
| External Memory Support | DDR2, DDR3L, LPDDR2, LPDDR3, QSPI, e.MMC | — |
| Cache | 32 KB I-cache, 32 KB D-cache | — |
| FPU / NEON | Yes (VFPv4 + NEON) | — |
| AES-OTF (On-The-Fly) | Yes | — |
| CAN-FD Controllers | 2 | — |
| HSIC Interface | Yes | — |
| Peripheral Touch Controller | Yes (PTC) | — |
| Backup Mode Current | 5 uA (typ) | 5 uA (per datasheet) |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| Packaging | Tape & Reel (TR) | — |
| MSL 等级 | 3 | — |
| RoHS 状态 | Compliant | Compliant |
| L1 Instruction Cache | 32 KB | — |
| L1 Data Cache | 32 KB | — |
| Embedded Audio Subsystem | Yes (I2S/TDM) | — |
| Core Processor | — | ARM Cortex-A5 |
| Number of Cores | — | 1 Core, 32-Bit |
| Memory Interfaces | — | DDR2, DDR3L, LPDDR1, LPDDR2, LPDDR3, QSPI, e.MMC |
| 工作温度范围 | — | -40 C to +85 C (industrial) |
| 电源电压 | — | 1.2 V core, 1.8 V/3.3 V I/O |
| Graphics | — | TFT LCD controller, 2D graphics engine, 720p H.264 video decoder |
| Connectivity | — | Gigabit Ethernet MAC with 1588 PTP, 2x CAN-FD, 3x USB (HS), 2x I2S, multiple TWI/SPI/UART |
| Security | — | Secure boot, hardware AES/SHA, TRNG, tamper pins |
| Touch Controller | — | Integrated peripheral touch controller (PTC) |
| Audio Subsystem | — | Embedded audio subsystem with I2S ports |