CDK1307CILP40 vs CDK2308AILP64 对比

详细并排对比 CDK1307CILP40 出自 MaxLinear 和 CDK2308AILP64 出自 MaxLinear。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

MaxLinear
CDK1307CILP40 CDK1307CILP40 - 12/13-bit 65MSPS Ultra-Low Power ADC | Exar

CDK1307CILP40 - 12/13-bit 65MSPS Ultra-Low Power ADC | Exar

CDK1307CILP40 ✓ 量产中
MaxLinear
CDK2308AILP64 CDK2308AILP64 - Dual 10-bit 20MSPS ADC | Exar | QFN-64

CDK2308AILP64 - Dual 10-bit 20MSPS ADC | Exar | QFN-64

CDK2308AILP64 ✓ 量产中

规格对比

参数 CDK1307CILP40 CDK2308AILP64
品牌 MaxLinear MaxLinear
分类 ADC/DAC ADC/DAC
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $3.95 $7.20
Part Number CDK1307CILP40 CDK2308AILP64
Manufacturer MaxLinear (formerly Exar/Cadeka) Exar (MaxLinear)
功能 Analog-to-Digital Converter (ADC) —
分辨率 12-bit / 13-bit selectable 10 bit
Sample Rate 65 MSPS (family supports 20/40/65/80 MSPS) —
Architecture Multi-stage pipeline with digital error correction Pipelined
Input Type Single-ended analog input Differential / Single-ended analog
Full-Scale Input Range 1 Vpp typical —
Supply Voltage (Analog) 3.3 V —
Supply Voltage (Digital) 3.3 V —
Reference Internal (1.2 V bandgap) —
Output Interface Parallel CMOS —
Control Interface CMOS serial configuration —
封装 40-pin LQFP (LP) 64-pin QFN (LP) 9x9 mm with exposed pad
工作温度 -40 C to +85 C (industrial) —
RoHS 状态 Compliant Compliant (per distributor listings)
Number of Channels — 2 (Dual)
Sampling Rate (Grade ILP64) — 20 MSPS
Family Maximum Sampling Rate — 80 MSPS (per family datasheet)
Analog Supply Voltage — +3.3 V
Digital Supply Voltage — +3.3 V
Data Interface — Parallel CMOS / TTL
安装类型 — Surface Mount
工作温度范围 — -40C to +85C (industrial)
Internal Reference — Yes (bandgap)
Input Bandwidth — [DATA_NEEDED: input bandwidth MHz]
INL (Integral Non-Linearity) — [DATA_NEEDED: INL in LSB]
DNL (Differential Non-Linearity) — [DATA_NEEDED: DNL in LSB]
SNR — [DATA_NEEDED: SNR dBFS]
Power Dissipation — [DATA_NEEDED: power in mW]

数据手册与资源

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