CDK8307DILP64 vs CDK8307BILP64 对比

详细并排对比 CDK8307DILP64 出自 MaxLinear 和 CDK8307BILP64 出自 MaxLinear。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

MaxLinear
CDK8307BILP64 CDK8307BILP64 - Octal 12/13-bit 40MSPS LVDS ADC | MaxLinear

CDK8307BILP64 - Octal 12/13-bit 40MSPS LVDS ADC | MaxLinear

CDK8307BILP64 ✓ 量产中

规格对比

参数 CDK8307DILP64 CDK8307BILP64
品牌 MaxLinear MaxLinear
分类 ADC/DAC ADC/DAC
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $13.95 $21.40
分辨率 12/13-bit 12-bit or 13-bit (programmable)
Sample Rate (max) 65 MSPS —
Sample Rate Options 20 / 40 / 50 / 65 MSPS —
Number of Channels 8 8
Architecture Proprietary pipelined —
Input Type Single-ended analog input Differential analog inputs (one per channel)
Output Interface Serial LVDS —
Reference Internal Internal (integrated bandgap reference)
Control Interface Serial (SPI-compatible) Serial control interface
Analog Supply Voltage 1.8 V —
Digital Supply Voltage (OVDD) 1.7 V to 3.6 V —
Power Consumption [DATA_NEEDED: mW per channel at 65 MSPS, total ~45 mW quoted by Mouser snippet but per-channel figure not in supplied data] —
封装 64-pin QFN (9x9 mm) 64-pin QFN (LP suffix)
工作温度范围 [DATA_NEEDED: industrial/commercial temperature grade] [DATA_NEEDED: operating temperature range]
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED] —
RoHS 状态 Compliant Compliant
Product Type — Octal Analog-to-Digital Converter (ADC)
Sample Rate (per channel) — 20 / 40 / 50 / 65 MSPS
Total Power Dissipation — 280 mW
Data Output Interface — Serial LVDS
Clock Architecture — External reference clock with integrated PLL (x12 or x14 multiplication)
电源电压 — [DATA_NEEDED: supply voltage rating]

数据手册与资源

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