EP1810GC-35 vs EP1810GC-35AB 对比

详细并排对比 EP1810GC-35 出自 Altera 和 EP1810GC-35AB 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1810GC-35 EP1810GC-35 - UV PLD, 40ns, CMOS, CPGA68 | Altera / Rochester

EP1810GC-35 - UV PLD, 40ns, CMOS, CPGA68 | Altera / Rochester

EP1810GC-35 ⚠ 最后一次采购

规格对比

参数 EP1810GC-35 EP1810GC-35AB
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $177.12 $9.95
Device Type EPLD (Erasable Programmable Logic Device) —
Logic Family Altera Classic EPLD —
Technology CMOS, UV-erasable EPROM cells CMOS EPROM
封装 CPGA-68 (Ceramic Pin Grid Array, 68-pin) —
引脚数 68 —
Propagation Delay (tpd max) 40 ns —
Maximum Inputs 64 64
Maximum Outputs 48 48
Macrocells 16 —
I/O Standard TTL-compatible —
Programming Method UV erasure + EPROM programming UV-erasable EPROM, in-system via JTAG-like interface
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
电源电压 [DATA_NEEDED: VCC range] —
安装类型 Through Hole —
RoHS 状态 Not applicable (legacy ceramic package) unknown
Lead-Free Status Not applicable —
Manufacturer (current source) Rochester Electronics (authorized Altera EPLD partner) —
Original Manufacturer Altera Corporation (now Intel FPGA) —
Product Family — Classic EPLD
Number of Macrocells — 48
Number of Usable Gates — 1200
Number of I/O Pins — 48
Dedicated Input Pins — 12
Propagation Delay (tPD) — 35 ns
Maximum Toggle Frequency — 62.5 MHz
Supply Voltage (VCC) — 5 V
Package Type — Pin Grid Array (PGA), ceramic

数据手册与资源

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