EP1810LC-20 vs EP1810LC-35 对比
详细并排对比 EP1810LC-20 出自 Intel 和 EP1810LC-35 出自 Rochester Electronics。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Rochester Electronics
EP1810LC-35 - 48-Macrocell Classic EPLD, 35ns, PLCC-68 | Rochester/Altera
EP1810LC-35 ⚠ 最后一次采购规格对比
| 参数 | EP1810LC-20 | EP1810LC-35 |
|---|---|---|
| 品牌 | Intel | Rochester Electronics |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.85 | $49.20 |
| Family | Classic EPLD | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | 900 | — |
| Macrocells | 48 | 48 |
| Maximum Operating Frequency | 50 MHz | 28.6 MHz |
| Propagation Delay (tPD) | 20 ns | — |
| 电源电压 | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS EPROM | CMOS, UV-erasable EPROM |
| Programmability | UV-Erasable / OTP | — |
| Dedicated Inputs | 12 | — |
| 封装 | 68-pin PLCC | 68-pin PLCC (J-Lead) |
| Package Suffix | LC (PLCC, windowed for UV erase on L variant) | — |
| Speed Grade | 20 ns (commercial) | — |
| 工作温度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| 安装类型 | Surface Mount | Surface Mount (socketable) |
| RoHS 状态 | [DATA_NEEDED: rohs status] | [DATA_NEEDED] |
| Series | — | Classic EP1810 |
| Equivalent Gates | — | 900 usable / 2100 equivalent |
| Propagation Delay (tpd) | — | 35 ns (max, '-35' speed grade) |
| Supply Voltage (VCC) | — | 5 V (4.75 V to 5.25 V) |
| I/O Pins | — | [DATA_NEEDED: I/O count exact] |
| Configuration Method | — | UV-erase + EPROM programmer |
| Programmable Interconnect | — | Centralized Programmable Interconnect Array (PIA) |
| Development Tool (legacy) | — | MAX+PLUS II / A+PLUS |
| Lead-Free | — | [DATA_NEEDED] |