EP1AGX60CF484I7N vs EP1AGX60CF484C7N 对比
详细并排对比 EP1AGX60CF484I7N 出自 Altera 和 EP1AGX60CF484C7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1AGX60CF484I7N | EP1AGX60CF484C7N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $218.75 | $185.00 |
| Family | Arria GX | Arria GX |
| Logic Elements | 60,100 | 60,000 |
| Embedded Memory | 2,528,640 bits | — |
| Embedded 18x18 Multipliers | 240 (estimated from family datasheet, [DATA_NEEDED: exact count]) | — |
| Maximum User I/O Pins | 229 | — |
| Transceiver Channels | Up to 12 high-speed SERDES channels | — |
| Transceiver Data Rate | Up to 3.125 Gbps | up to 3.125 Gbps |
| PLLs | 4 | [DATA_NEEDED: PLL count] |
| Global Clocks | [DATA_NEEDED: global clock count] | — |
| 封装 | 484-ball FineLine BGA (1.0 mm pitch) | 484-BGA (FineLine BGA) |
| Operating Temperature (Industrial) | -40C to +100C (I7 grade) | — |
| Core Voltage | 1.2 V typical | — |
| I/O Standards Supported | LVDS, LVPECL, SSTL, HSTL, PCI, PCI-X, LVTTL, LVCMOS | — |
| Configuration Modes | Passive Serial, JTAG, Fast Passive Parallel | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status from Altera/Intel product page] | — |
| MSL 等级 | 3 (per JEDEC J-STD-020, typical for FineLine BGA) | — |
| Embedded Memory Bits | — | 2,528,640 |
| Maximum User I/O | — | 229 |
| Speed Grade | — | C7 |
| 工作温度 | — | Commercial (0C to +85C) |
| Process Node | — | 90 nm |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| 安装类型 | — | Surface Mount (BGA) |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free status] |
| Development Tool | — | Quartus II |