EP1K100QC208-3 vs EP1K10QC208-3 对比

详细并排对比 EP1K100QC208-3 出自 Altera 和 EP1K10QC208-3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K100QC208-3 EP1K10QC208-3
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $60.04 $21.40
Product Family ACEX 1K —
Device Type FPGA (Field Programmable Gate Array) —
Process Technology 0.22 um CMOS 0.22 µm SRAM CMOS
Typical Gate Count 100,000 gates 10,000 gates
Number of Logic Elements 4,992 —
Logic Array Blocks (LABs) 624 72
Total RAM Bits 49,152 bits 12,288 bits
Maximum User I/O 147 —
Maximum Internal Clock Frequency 200 MHz —
Core Supply Voltage 2.5 V —
Package Type 208-Pin BFQFP (PQFP) —
Number of Terminals 208 —
Terminal Form Gull Wing —
Package Shape Square —
Temperature Grade Commercial —
安装类型 Surface Mount Surface Mount
Speed Grade -3 -3
RoHS / Lead-Free Suffix No -N suffix; compliance not verified in retrieved source data —
I/O Standards Supported [DATA_NEEDED: supported I/O standards] —
Configuration Memory SRAM-based loadable PLD —
Family — ACEX-1K
Logic Elements (LEs) — 576
Embedded System Blocks (EABs) — 3 (each 4 Kbit, dual-port capable)
Maximum User I/O Pins — 120
Supply Voltage - Core — 2.5 V
Supply Voltage - I/O — 3.3 V (multi-standard I/O)
封装 — 208-pin PQFP (BFQFP)
工作温度 — Commercial (0C to +70C)
MSL 等级 — 3 (per JEDEC J-STD-020)
RoHS 状态 — Compliant

数据手册与资源

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