EP1K100QC208-3N vs EP1K100QI208-2N 对比
详细并排对比 EP1K100QC208-3N 出自 Altera 和 EP1K100QI208-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1K100QC208-3N | EP1K100QI208-2N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $19.50 | $0.00 |
| Product Series | ACEX-1K | — |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Number of Logic Elements | 4992 | — |
| Number of LABs | 624 | — |
| Embedded RAM Bits | 49152 | — |
| Total Typical Gates | 100K | — |
| Number of User I/Os | 147 | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage Range | [DATA_NEEDED: I/O supply voltage range] | — |
| Maximum Internal Clock Frequency | 200 MHz | [DATA_NEEDED: clock frequency for -2 speed grade] |
| Package Type | 208-BFQFP | — |
| 引脚数 | 208 | — |
| 安装类型 | Surface Mount | Surface Mount |
| Terminal Form | Gull Wing | — |
| JTAG Boundary Scan | IEEE Std. 1149.1-1990 compliant built-in BST | — |
| Lead-Free Version | Yes (N suffix) | — |
| 工作温度范围 | Commercial grade ([DATA_NEEDED: exact operating temperature range]) | [DATA_NEEDED: exact industrial temperature limits from ACEX-1K datasheet] |
| Supported Configuration Devices | EPC2/EPC16 family ([DATA_NEEDED: exact ACEX-1K supported list]) | — |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS certificate status] | [DATA_NEEDED: manufacturer RoHS certificate] |
| Series | — | ACEX-1K |
| FPGA Family | — | ACEX-1K |
| Number of Logic Elements/Cells | — | 4992 |
| Number of LABs/CLBs | — | 624 |
| Total RAM Bits | — | 49152 |
| Number of User I/O | — | 147 |
| 封装 / 外壳 | — | 208-BFQFP |
| Speed Grade | — | -2 |
| Temperature Grade | — | I (industrial) |
| System Gates | — | 257000 |
| Typical Gate Count | — | 100K gates (family) |
| Max User I/O in 208-BFQFP | — | 147 |
| Total Number of Configuration Bits | — | [DATA_NEEDED: configuration bitstream size] |
| I/O Standard Support | — | [DATA_NEEDED: supported I/O standards] |
| PLL/Clock Management | — | [DATA_NEEDED: PLL availability on EP1K100] |