EP1K100QI208-02 vs EP1K100QC208-3 对比

详细并排对比 EP1K100QI208-02 出自 Altera 和 EP1K100QC208-3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K100QI208-02 EP1K100QC208-3
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $13.95 $60.04
Family ACEX-1K —
Logic Elements 4,992 —
System Gates 100,000 —
Logic Array Blocks (LABs) 624 624
Embedded Memory (RAM bits) 49,152 —
Maximum User I/O Pins 147 —
Process Technology 0.22 µm SRAM 0.22 um CMOS
Core Voltage 2.5 V —
Speed Grade -02 (slowest) -3
Maximum Frequency 250 MHz —
封装 208-BFQFP (PQFP, gull-wing) —
安装类型 Surface Mount Surface Mount
Configuration Method SRAM-based, serial/parallel/JTAG —
MultiVolt I/O Support 2.5 V / 3.3 V / 5 V —
工作温度 -40°C to +85°C (industrial) —
RoHS 状态 Unknown (legacy family) —
Lead-Free Unknown —
Product Family — ACEX 1K
Device Type — FPGA (Field Programmable Gate Array)
Typical Gate Count — 100,000 gates
Number of Logic Elements — 4,992
Total RAM Bits — 49,152 bits
Maximum User I/O — 147
Maximum Internal Clock Frequency — 200 MHz
Core Supply Voltage — 2.5 V
Package Type — 208-Pin BFQFP (PQFP)
Number of Terminals — 208
Terminal Form — Gull Wing
Package Shape — Square
Temperature Grade — Commercial
RoHS / Lead-Free Suffix — No -N suffix; compliance not verified in retrieved source data
I/O Standards Supported — [DATA_NEEDED: supported I/O standards]
Configuration Memory — SRAM-based loadable PLD

数据手册与资源

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