EP1K100QI208-2 vs EP1K100QC208-3N 对比

详细并排对比 EP1K100QI208-2 出自 Altera 和 EP1K100QC208-3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1K100QC208-3N EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N Obsolete

规格对比

参数 EP1K100QI208-2 EP1K100QC208-3N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $23.90 $19.50
Family ACEX-1K —
Logic Elements 4,992 cells —
System Gates 100,000 —
Logic Array Blocks (LABs) 624 —
Embedded Memory (EAB) 49,152 bits —
User I/Os 147 —
Maximum Operating Frequency 250 MHz —
Core Voltage (VCCINT) 2.5 V —
Process Technology 0.22 umm CMOS SRAM —
封装 208-pin PQFP (BFQFP) —
Pitch 0.5 mm —
安装类型 Surface Mount Surface Mount
工作温度 -40C to +85C (Industrial) —
Configuration Interface JTAG (IEEE 1149.1) / serial / EPC2 —
Global Clock Networks 4 —
I/O Standards Supported LVTTL, LVCMOS, PCI, 5V tolerant —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS certificate status]
Product Series — ACEX-1K
Device Type — Field Programmable Gate Array (FPGA)
Number of Logic Elements — 4992
Number of LABs — 624
Embedded RAM Bits — 49152
Total Typical Gates — 100K
Number of User I/Os — 147
Core Supply Voltage — 2.5 V
I/O Supply Voltage Range — [DATA_NEEDED: I/O supply voltage range]
Maximum Internal Clock Frequency — 200 MHz
Package Type — 208-BFQFP
引脚数 — 208
Terminal Form — Gull Wing
JTAG Boundary Scan — IEEE Std. 1149.1-1990 compliant built-in BST
Lead-Free Version — Yes (N suffix)
工作温度范围 — Commercial grade ([DATA_NEEDED: exact operating temperature range])
Supported Configuration Devices — EPC2/EPC16 family ([DATA_NEEDED: exact ACEX-1K supported list])
Moisture Sensitivity Level — [DATA_NEEDED: MSL level]

数据手册与资源

浏览全部产品 创建 BOM 获取报价