EP1K10QC208-2 vs EP1K100QC208-3 对比

详细并排对比 EP1K10QC208-2 出自 Intel 和 EP1K100QC208-3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K10QC208-2 EP1K100QC208-3
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $12.50 $60.04
Family ACEX-1K —
Logic Elements 576 —
Configurable Logic Blocks (CLBs) 72 —
Equivalent Gates 10,000 —
Embedded RAM Bits 12,288 —
Embedded Array Blocks (EABs) 3 (per datasheet, 4096-bit each) —
Maximum User I/O 120 147
Supply Voltage (Core) 2.5 V —
Speed Grade -2 -3
封装 208-pin BQFP (PQFP, gull-wing) —
工作温度 Commercial (0C to +70C) —
Configuration Method SRAM, serial —
Process Technology 2.5 V CMOS 0.22 um CMOS
JTAG Support IEEE 1149.1 boundary-scan —
Lead-Free / RoHS Non-compliant (legacy Altera part) —
Product Family — ACEX 1K
Device Type — FPGA (Field Programmable Gate Array)
Typical Gate Count — 100,000 gates
Number of Logic Elements — 4,992
Logic Array Blocks (LABs) — 624
Total RAM Bits — 49,152 bits
Maximum Internal Clock Frequency — 200 MHz
Core Supply Voltage — 2.5 V
Package Type — 208-Pin BFQFP (PQFP)
Number of Terminals — 208
Terminal Form — Gull Wing
Package Shape — Square
Temperature Grade — Commercial
安装类型 — Surface Mount
RoHS / Lead-Free Suffix — No -N suffix; compliance not verified in retrieved source data
I/O Standards Supported — [DATA_NEEDED: supported I/O standards]
Configuration Memory — SRAM-based loadable PLD

数据手册与资源

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