EP1K10QC208-3 vs EP1K100QC208-3 对比

详细并排对比 EP1K10QC208-3 出自 Altera 和 EP1K100QC208-3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K10QC208-3 EP1K100QC208-3
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $21.40 $60.04
Family ACEX-1K —
Typical Gate Count 10,000 gates 100,000 gates
Logic Elements (LEs) 576 —
Embedded System Blocks (EABs) 3 (each 4 Kbit, dual-port capable) —
Total RAM Bits 12,288 bits 49,152 bits
Logic Array Blocks (LABs) 72 624
Maximum User I/O Pins 120 —
Supply Voltage - Core 2.5 V —
Supply Voltage - I/O 3.3 V (multi-standard I/O) —
Speed Grade -3 -3
封装 208-pin PQFP (BFQFP) —
Process Technology 0.22 µm SRAM CMOS 0.22 um CMOS
工作温度 Commercial (0C to +70C) —
安装类型 Surface Mount Surface Mount
MSL 等级 3 (per JEDEC J-STD-020) —
RoHS 状态 Compliant —
Product Family — ACEX 1K
Device Type — FPGA (Field Programmable Gate Array)
Number of Logic Elements — 4,992
Maximum User I/O — 147
Maximum Internal Clock Frequency — 200 MHz
Core Supply Voltage — 2.5 V
Package Type — 208-Pin BFQFP (PQFP)
Number of Terminals — 208
Terminal Form — Gull Wing
Package Shape — Square
Temperature Grade — Commercial
RoHS / Lead-Free Suffix — No -N suffix; compliance not verified in retrieved source data
I/O Standards Supported — [DATA_NEEDED: supported I/O standards]
Configuration Memory — SRAM-based loadable PLD

数据手册与资源

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