EP1K30QI208-3N vs EP1K30QC208-3N 对比

详细并排对比 EP1K30QI208-3N 出自 Altera 和 EP1K30QC208-3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP1K30QC208-3N EP1K30QC208-3N - ACEX-1K FPGA, 30K Gates, 208-PQFP | Altera

EP1K30QC208-3N - ACEX-1K FPGA, 30K Gates, 208-PQFP | Altera

EP1K30QC208-3N ⚠ 最后一次采购

规格对比

参数 EP1K30QI208-3N EP1K30QC208-3N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $18.10 $15.90
Series ACEX 1K —
Family ACEX-1K ACEX-1K
Logic Elements / Cells 1728 —
Total RAM Bits 24576 —
Number of I/O 147 —
Number of Dedicated Inputs 6 —
Number of Gates (typical) 30000 —
Number of Embedded Array Blocks 6 —
Core Supply Voltage 2.375 V to 2.625 V (nominal 2.5 V) 2.5 V
I/O Standards LVTTL, LVCMOS (multi-voltage I/O) —
工作温度 -40 C to +85 C (industrial) Industrial (N suffix)
Speed Grade -3 -3 (fastest)
封装 208-pin PQFP / FQFP (S-PQFP-G208), 0.5 mm pitch 208-BQFP / 208-PQFP
Configuration Memory Volatile SRAM (serial configuration required) —
Programming Interface JTAG (IEEE 1149.1) + serial configuration —
安装类型 Surface Mount (fine-pitch QFP) Surface Mount
RoHS 状态 Compliant Compliant (lead-free / Pb-free)
Logic Elements — 1,728
Typical Gates — 30,000
Logic Array Blocks (LABs) — 172
Embedded Array Blocks (EABs) — 6 (24 Kbits total)
Maximum User I/O — 147
Process Technology — 0.18 µm CMOS, SRAM-based LUT
I/O Supply Voltage (VCCIO) — 3.3 V (5 V tolerant I/O supported)
Configuration Interface — Serial / Parallel / JTAG (IEEE 1149.1)

数据手册与资源

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