EP1K30TC144-2 vs EP1K30TC144-3 对比
详细并排对比 EP1K30TC144-2 出自 Intel 和 EP1K30TC144-3 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1K30TC144-2 | EP1K30TC144-3 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $18.40 | $10.80 |
| Family | ACEX 1K | — |
| Logic Elements / Cells | 1,728 | 1,728 |
| System Gates | 30,000 | — |
| Logic Array Blocks (LABs) | 216 | — |
| User I/Os | 102 | — |
| Embedded Array Blocks (EABs) | 6 | — |
| Total EAB Memory | 24,576 bits | — |
| Process Technology | 0.22 µm SRAM LUT | 0.22 µm SRAM |
| Core Supply Voltage (VCCINT) | 2.5 V (2.375 V - 2.625 V) | — |
| I/O Supply Voltage (VCCIO) | 3.3 V (LVTTL/LVCMOS), 2.5 V, or PCI | — |
| Maximum Internal Clock Frequency | 200 MHz | — |
| 封装 | 144-pin TQFP (TC) | 144-LQFP / 144-TQFP (22x22 mm, 0.5 mm pitch) |
| Operating Temperature (Commercial) | 0C to +70C | 0C to +70C |
| 安装类型 | Surface Mount | Surface Mount |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| Configuration Method | Passive Serial / JTAG / EPC1/EPC2 PROM | Serial configuration device (EPC2/EPC8 compatible) |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status from datasheet] |
| Speed Grade | -2 (mid commercial speed grade) | -3 (slowest speed bin) |
| Series | — | ACEX-1K |
| Total RAM Bits | — | 24,576 |
| Number of LABs/CLBs | — | 216 |
| Typical Gates | — | 30,000 |
| Maximum System Gates | — | 56,000 |
| Number of User I/O | — | 102 |
| Number of Logic Array Blocks | — | 216 |
| Supply Voltage (Core) | — | 2.5 V |
| I/O Voltage Standard | — | 2.5 V LVCMOS / LVTTL (MultiVolt up to 5.0 V tolerant) |
| Boundary Scan | — | IEEE 1149.1 JTAG compliant |
| Number of Global Clocks | — | 8 |