EP1K30TC144-3N vs EP1K30TC144-3 对比

详细并排对比 EP1K30TC144-3N 出自 Intel 和 EP1K30TC144-3 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EP1K30TC144-3N EP1K30TC144-3N - 30K Gate ACEX-1K FPGA 144-LQFP | Intel / Altera

EP1K30TC144-3N - 30K Gate ACEX-1K FPGA 144-LQFP | Intel / Altera

EP1K30TC144-3N ⚠ 最后一次采购

规格对比

参数 EP1K30TC144-3N EP1K30TC144-3
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $16.40 $10.80
Series ACEX-1K ACEX-1K
Family ACEX-1K® Field Programmable Gate Array —
Typical Gates 30,000 30,000
Logic Elements (LE) 1,728 —
Logic Array Blocks (LAB) 216 —
Embedded Array Blocks (EAB) 6 —
Total RAM Bits 24,576 24,576
User I/O Pins 102 —
Process Technology 0.22 µm CMOS (SRAM-based) 0.22 µm SRAM
Core Supply Voltage 2.5 V —
Maximum Internal Frequency 200 MHz —
Speed Grade -3 (slowest tier of ACEX-1K) -3 (slowest speed bin)
封装 144-pin LQFP (TQFP) 22x22 mm 144-LQFP / 144-TQFP (22x22 mm, 0.5 mm pitch)
安装类型 Surface Mount Surface Mount
Configuration SRAM, in-system programmable via serial / JTAG —
RoHS 状态 Unknown (legacy part - verify with distributor) [DATA_NEEDED: rohs status from datasheet]
Logic Elements / Cells — 1,728
Number of LABs/CLBs — 216
Maximum System Gates — 56,000
Number of User I/O — 102
Number of Logic Array Blocks — 216
Supply Voltage (Core) — 2.5 V
I/O Voltage Standard — 2.5 V LVCMOS / LVTTL (MultiVolt up to 5.0 V tolerant)
Operating Temperature (Commercial) — 0C to +70C
Configuration Method — Serial configuration device (EPC2/EPC8 compatible)
Boundary Scan — IEEE 1149.1 JTAG compliant
Number of Global Clocks — 8

数据手册与资源

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