EP1K30TI144-2N vs EP1K30TI144-2NGA 对比

详细并排对比 EP1K30TI144-2N 出自 Intel 和 EP1K30TI144-2NGA 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K30TI144-2N EP1K30TI144-2NGA
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $25.00 $18.20
Series ACEX-1K ACEX 1K
Manufacturer Intel (formerly Altera) —
Logic Elements / Cells 1728 1728
Typical Gate Count 30,000 gates —
Embedded Memory (RAM bits) 24,576 bits —
Maximum User I/O 102 —
Number of Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] 216
Number of Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count] —
Core Voltage (VCCINT) 2.5 V 2.5 V
I/O Voltage (VCCIO) 2.5 V / 3.3 V —
Process Technology 0.22 µm CMOS SRAM 0.18 um SRAM CMOS
Speed Grade -2 -2 (faster than -3)
Operating Temperature Grade Industrial —
工作温度范围 -40 °C to +100 °C ambient —
封装 144-pin LQFP —
Lead Pitch 0.5 mm —
安装类型 Surface Mount Surface Mount
Configuration Interface JTAG (IEEE 1149.1), serial passive/active —
RoHS 状态 Compliant (per Utmel product note) —
MSL 等级 [DATA_NEEDED: MSL rating] —
Total RAM Bits — 24576
Number of I/O — 102
Number of Gates (typical) — 119000
I/O Supply Voltage (VCCIO) — 3.3 V
工作温度 — -40C to +85C (Industrial)
封装 / 外壳 — 144-LFQFP / 144-TQFP (20x20 mm)
Programmable Logic Type — In-system programmable SRAM FPGA
Lead Free / RoHS Status — Lead free / RoHS compliant per suffix code
Design Software — Quartus II, MAX+PLUS II
JTAG Support — Yes (IEEE 1149.1 boundary scan)
Configuration — SRAM-based, requires configuration device at power-up

数据手册与资源

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