EP1K50QC208-2 vs EP1K50QC208-3N 对比

详细并排对比 EP1K50QC208-2 出自 Intel 和 EP1K50QC208-3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50QC208-2 EP1K50QC208-3N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $20.95 $13.85
Family ACEX-1K ACEX-1K
Logic Elements / Cells 2880 —
Total Gates 50000 —
Logic Array Blocks (LABs) 360 360
Embedded Memory (RAM bits) 40960 —
Number of I/Os 147 —
Core Voltage 2.5 V —
Process Technology 0.22 µm 0.22 µm CMOS
Maximum Operating Frequency 200 MHz 166.67 MHz
Package Type 208-BFQFP (PQFP-208) —
Package Style Power Quad Flat Pack, Gull-Wing Leads —
安装类型 Surface Mount Surface Mount
Configuration Method SRAM, JTAG (IEEE 1149.1) / PS / AS via EPC series —
工作温度 0 °C to +70 °C (Commercial) 0 °C to +70 °C (Commercial)
Speed Grade -2 (Commercial) —
RoHS 状态 [DATA_NEEDED: RoHS status] —
Lead-Free / Tin-Lead [DATA_NEEDED: lead-free / SnPb] —
Typical Gates — 50,000
Logic Elements (LEs) — 2,880
Embedded RAM — 40,960 bits (10 EABs × 4,096 bits)
Maximum User I/Os — 147
Pin-to-Pin Logic Delay — 0.5 ns (typical, -3 speed grade)
Core Supply Voltage (VCCINT) — 2.5 V
I/O Supply Voltage (VCCIO) — 3.3 V (PCI-compatible I/O banks)
封装 — 208-pin PQFP / BFQFP (Plastic Quad Flat Pack)
Programming Interface — IEEE 1149.1 JTAG + in-system configurable
Lead-Free / RoHS — Compliant (Pb-free terminal finish per 'N' suffix)

数据手册与资源

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