EP1K50QC208-3Q vs EP1K50QC208-2N 对比

详细并排对比 EP1K50QC208-3Q 出自 Altera 和 EP1K50QC208-2N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50QC208-3Q EP1K50QC208-2N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $20.10 $27.80
Family ACEX 1K ACEX 1K
Logic Elements 2,880 cells 2,880
Equivalent Gates 50,000 gates —
Embedded Memory 40,960 bits (12 EABs) —
Logic Array Blocks (LABs) 360 360
Embedded Array Blocks (EABs) 12 —
Maximum User I/O 147 —
Maximum Operating Frequency 166.67 MHz —
Process Technology 0.22 µm CMOS 0.22 µm CMOS
Core Supply Voltage 2.5 V 2.5 V
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V tolerant —
Speed Grade -3 (standard commercial) —
封装 208-pin PQFP (Plastic Quad Flat Pack) 208-pin PQFP (BFQFP)
Programming Interface IEEE 1149.1 JTAG —
Operating Temperature Grade Q suffix — military/aerospace range —
安装类型 Surface Mount Surface Mount (Gull-Wing)
Series — ACEX-1K
Typical Gates — 50,000
Embedded Memory (EAB SRAM) — 40 kbit
User I/Os — 147
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Maximum Toggle Frequency — 200 MHz
Pin-to-Pin Delay (LE) — 0.4 ns (per data sheet snippet)
I/O Supply Voltage — [DATA_NEEDED: I/O supply voltage]
Configuration Interface — JTAG (IEEE 1149.1), Serial (PS/AS)
工作温度 — 0 °C to 85 °C (Commercial)
MSL 等级 — [DATA_NEEDED: MSL level]
RoHS 状态 — [DATA_NEEDED: RoHS status]

数据手册与资源

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