EP1K50TC144-1 vs EP1K50TI144-2N 对比

详细并排对比 EP1K50TC144-1 出自 Altera 和 EP1K50TI144-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50TC144-1 EP1K50TI144-2N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.95 $9.95
Family ACEX-1K ACEX-1K
Logic Elements / Cells 2,880 —
System Gates 50,000 —
Embedded Memory (Bits) 40,960 —
Logic Array Blocks (LABs) 360 360
User I/O Pins 102 —
Core Voltage 2.5 V —
I/O Voltage 2.5 V (5-V tolerant I/O) —
Maximum Internal Frequency 250 MHz —
Process Technology CMOS 0.22 µm
Embedded Array Blocks (EABs) Dual-port, configurable as RAM/ROM —
封装 144-pin LQFP (TQFP) 144-LQFP (TQFP, 0.5 mm pitch)
安装类型 Surface Mount (Gull-Wing Leads) Surface Mount
Operating Temperature Grade Commercial —
Programming Interface JTAG (IEEE 1149.1) + serial configuration —
Development Tools MAX+PLUS II, Quartus —
Lead-Free / RoHS [DATA_NEEDED: Lead-free / RoHS status] Check supplier (ACEX-1K predates RoHS mandate)
MSL 等级 [DATA_NEEDED: MSL moisture sensitivity level] —
Logic Elements — 40,960
Typical Gates — 50,000
Logic Cells — 2,880
User I/O Count — 102
Maximum Operating Frequency — 166.67 MHz
Embedded RAM Bits — 40,960 (12 ESBs)
Operating Voltage (VCCINT) — 2.5 V
工作温度 — -40C to +85C (industrial, "N" suffix)
Speed Grade — -2 (faster)
Configuration Method — SRAM / JTAG (IEEE 1149.1)

数据手册与资源

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