EP1K50TC144-3N vs EP1K50TC144-2N 对比

详细并排对比 EP1K50TC144-3N 出自 Intel 和 EP1K50TC144-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50TC144-3N EP1K50TC144-2N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $9.15 $22.45
Series ACEX-1K ACEX-1K
Family ACEX 1K Programmable Logic Device Family ACEX 1K Device Family (2.5 V)
Logic Elements / Cells 2880 —
System Gates 40960 (50K nominal) —
Number of LABs/CLBs 360 —
Embedded Memory (EAB) 40 kbit (12 EABs, dual-port) 40,960 bits (12 EABs x 4,096 bits)
User I/O Count 102 —
Number of Gates 199000 (maximum) —
Operating Frequency (Max) 166.67 MHz —
Core Voltage 2.5 V —
I/O Voltage Support 2.5 V / 3.3 V / 5.0 V (multiVolt) —
Process Technology 0.22 µm CMOS 0.22 µm CMOS
Logic Delay (pin-to-pin) 5.0 ns —
封装 144-LQFP (TQFP-144), 22 x 22 mm, 0.5 mm pitch TQFP-144 (144-LQFP), 22 x 22 mm, 0.5 mm pitch
Programming Interface JTAG (IEEE 1149.1) / Altera serial —
Operating Temperature Grade Commercial (0 °C to +70 °C) — inferred from '-N' suffix Commercial (suffix N)
安装类型 Surface Mount Surface Mount
RoHS 状态 Compliant [DATA_NEEDED: rohs status]
Typical Gates — 50,000
Maximum Gates — 100,000
Logic Elements (Cells) — 2,880
Logic Array Blocks (LABs) — 360
User I/Os — 102
引脚数 — 144
Core Voltage (VCCINT) — 2.5 V
I/O Voltage (VCCIO) — 2.5 V / 3.3 V (multi-standard)
Internal Frequency — Up to 200 MHz
Propagation Delay (speed grade) — 0.4 ns nominal (speed grade -2)
Configuration — Serial, JTAG, supported configuration devices (EPC, EPC2)
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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