EP1K50TI144-2Q vs EP1K50TC144-2N 对比

详细并排对比 EP1K50TI144-2Q 出自 Intel 和 EP1K50TC144-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50TI144-2Q EP1K50TC144-2N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $19.85 $22.45
Family ACEX-1K ACEX 1K Device Family (2.5 V)
Device Logic Elements 2880 —
Typical Gate Count 50000 —
Embedded Memory Bits (EAB) 40960 —
Number of User I/O 102 —
Number of Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] —
Number of Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count] —
Core Voltage (VCCINT) 2.5 V 2.5 V
I/O Bank Voltage (VCCIO) 2.5 V / 3.3 V compatible per bank —
Process Technology 0.22 um CMOS 0.22 µm CMOS
Speed Grade -2 —
Operating Temperature Grade Industrial (-40C to +100C) Commercial (suffix N)
封装 144-pin TQFP (TQFP-144) TQFP-144 (144-LQFP), 22 x 22 mm, 0.5 mm pitch
Configuration Scheme SRAM, serial or parallel, JTAG (IEEE 1149.1) —
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
Series — ACEX-1K
Typical Gates — 50,000
Maximum Gates — 100,000
Logic Elements (Cells) — 2,880
Logic Array Blocks (LABs) — 360
Embedded Memory (EAB) — 40,960 bits (12 EABs x 4,096 bits)
User I/Os — 102
引脚数 — 144
I/O Voltage (VCCIO) — 2.5 V / 3.3 V (multi-standard)
Internal Frequency — Up to 200 MHz
Propagation Delay (speed grade) — 0.4 ns nominal (speed grade -2)
Configuration — Serial, JTAG, supported configuration devices (EPC, EPC2)
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

浏览全部产品 创建 BOM 获取报价