EP1K50TL144-2 vs EP1K30TI144-2 对比

详细并排对比 EP1K50TL144-2 出自 Altera 和 EP1K30TI144-2 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K50TL144-2 EP1K30TI144-2
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $22.10 $13.85
Family ACEX 1K ACEX-1K
Typical Gates 50,000 —
Logic Elements 2,880 —
Logic Array Blocks (LABs) 360 —
Embedded Memory (RAM bits) 40,960 —
User I/O Pins 102 —
Core Voltage 2.5 V —
I/O Voltage 2.5 V / 3.3 V / 5.0 V (MultiVolt) —
Process Technology 0.18 um CMOS 0.22 µm CMOS, SRAM-based
封装 144-pin TQFP 144-LQFP (TQFP), 22 mm × 22 mm, 0.5 mm pitch
Speed Grade -2 (faster grade) -2 (mid-tier)
Temperature Grade Industrial (-40C to +100C) —
Configuration JTAG in-system programmable —
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance - legacy part]
Series — EP1K30
Logic Elements / Cells — 1728
Total RAM Bits — 24576
Number of Logic Array Blocks (LABs) — 216
Equivalent Gates — 30,000
User I/O Count — 102
Number of I/O Banks — 4
Supply Voltage - Core — 2.5 V (2.375 V min, 2.625 V max)
Supply Voltage - I/O — 2.5 V / 3.3 V / 5.0 V (multiVolt)
Maximum Internal Frequency — 200 MHz
Embedded Memory Type — Dual-port EAB (Embedded Array Block)
工作温度 — -40 °C to +85 °C (Industrial, "I" suffix)
Configuration Method — SRAM, requires external configuration PROM (EPC)
Programming Interface — JTAG (IEEE 1149.1) / IEEE 1532 ISP

数据手册与资源

浏览全部产品 创建 BOM 获取报价