EP1M120F484-I6 vs EP1M120F484C6N 对比
详细并排对比 EP1M120F484-I6 出自 Altera 和 EP1M120F484C6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1M120F484-I6 | EP1M120F484C6N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $98.50 | $56.50 |
| Family | Mercury FPGA | Mercury (APEX PLD platform) |
| Logic Elements (LEs) | 4,800 | — |
| Equivalent Gates | 120,000 | — |
| Logic Array Blocks (LABs) | 480 | 480 |
| User I/Os | 303 | 303 |
| High-Speed Transceivers | Up to 12 channels | — |
| Transceiver Data Rate | Up to 1.25 Gbps per channel | Up to 1.25 Gbps with CDR |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.18 µm CMOS | CMOS |
| 封装 | 484-pin FBGA (FineLine BGA) | 484-ball FC-FBGA (FineLine BGA) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | -40 °C to +100 °C (industrial) | 0C to 85C (commercial) |
| Speed Grade | -6 | — |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, JTAG, EPC device | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL | — |
| Typical Gates | — | 120,000 |
| Logic Cells / Elements | — | 4,800 |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Architecture | — | LUT-based, optimized for high-speed interconnect |
| MultiCore Support | — | Yes (hot socketing) |
| MSL 等级 | — | 3 (per JEDEC J-STD-020) |
| RoHS 状态 | — | Compliant |