EP1M120F484C7N vs EP1M120F484C6N 对比

详细并排对比 EP1M120F484C7N 出自 Altera 和 EP1M120F484C6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1M120F484C7N EP1M120F484C6N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $108.00 $56.50
Family Altera Mercury Mercury (APEX PLD platform)
System Gates 120,000 —
Logic Elements / Cells 4,800 —
Logic Array Blocks (LABs) 480 480
Embedded Memory (RAM bits) 49,152 —
Maximum User I/O Pins 303 —
Logic Family CMOS —
Core Supply Voltage 1.8 V —
Integrated Transceivers Yes - CDR to 1.25 Gbps —
Package Type 484-ball FineLine BGA (FCBGA) —
Package Code F484 —
工作温度 0°C to 85°C (Commercial) 0C to 85C (commercial)
Temperature Grade Suffix C (Commercial, 0–85°C) —
Speed Grade 7 —
RoHS / Lead-Free Suffix N (lead-free) —
Process Node [DATA_NEEDED: process node] —
Transceiver Channels [DATA_NEEDED: number of transceiver channels] —
Typical Gates — 120,000
Logic Cells / Elements — 4,800
User I/Os — 303
封装 — 484-ball FC-FBGA (FineLine BGA)
Core Supply Voltage (VCCINT) — 1.71 V to 1.89 V (1.8 V nominal)
Transceiver Data Rate — Up to 1.25 Gbps with CDR
Process Technology — CMOS
Architecture — LUT-based, optimized for high-speed interconnect
MultiCore Support — Yes (hot socketing)
安装类型 — Surface Mount
MSL 等级 — 3 (per JEDEC J-STD-020)
RoHS 状态 — Compliant

数据手册与资源

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