EP1M350F780I6N vs EP1M350F780C8 对比

详细并排对比 EP1M350F780I6N 出自 Altera 和 EP1M350F780C8 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1M350F780I6N EP1M350F780C8
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $165.00 $175.00
Series Mercury —
Family Mercury Family FPGA —
Equivalent Gates 350K —
Logic Cells / Elements 14,400 —
Logic Array Blocks (LABs) 1,440 —
Total RAM Bits 114,688 —
User I/Os 486 —
Core Supply Voltage 1.8 V (1.71 V to 1.89 V) —
Transceiver Data Rate Up to 1.25 Gbps (with CDR) —
Logic Family / Process CMOS —
Package Type 780-FBGA (FineLine BGA, FINE LINE) —
Package Dimensions 29 mm x 29 mm —
安装类型 Surface Mount Surface Mount (BGA)
工作温度 -40 °C to +85 °C (industrial, I6) 0C to +85C (commercial)
MSL 等级 3 [DATA_NEEDED: MSL rating]
RoHS 状态 [DATA_NEEDED: rohs_status] unknown (legacy device)
Architecture LUT-based, high-speed optimized —
Device Family — Altera APEX Mercury (EP1M)
Typical Gates — 350,000
Maximum Logic Elements (LEs) — 12,160
Embedded RAM Blocks — 4 dual-port RAM blocks
封装 — 780-ball FineLine BGA
Speed Grade — C8 (commercial, speed bin 8)
Supply Voltage (Core) — [DATA_NEEDED: core Vcc]
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards)
Global Clock Networks — 8
Configuration Interface — IEEE 1532 / passive serial / JTAG
Maximum User I/O — [DATA_NEEDED: user I/O count]
In-System Programmability — Yes (ISP via JTAG)

数据手册与资源

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