EP1S10B672C6 vs EP1S10F672C7N 对比
详细并排对比 EP1S10B672C6 出自 Intel 和 EP1S10F672C7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S10B672C6 | EP1S10F672C7N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $185.00 | $171.00 |
| Manufacturer | Intel / Altera | — |
| Series | Stratix | Stratix |
| Logic Elements / Cells | 10,570 | 10,570 |
| LABs / CLBs | 1,057 | — |
| User I/Os | 345 | — |
| 封装 | 672-BBGA (35 x 35 mm, 1.27 mm pitch) | — |
| Supply Voltage (Core) | 1.5 V (1.425 V - 1.575 V) | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Maximum Operating Frequency | 450.05 MHz | 420.17 MHz |
| 工作温度 | 0 C to 85 C (Commercial Extended) | 0C to +85C (Commercial) |
| Logic Family | CMOS | — |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| Supplier Device Package | 672-BGA | — |
| Memory | Embedded TriMatrix (MRAM/M4K) blocks | — |
| DSP Blocks | Yes, dedicated multiply-accumulate blocks | 6 |
| Clock Management | PLLs for clock synthesis | — |
| Configuration | JTAG / passive serial / fast passive parallel | — |
| RoHS 状态 | Compliant | [DATA_NEEDED: RoHS compliance] |
| Number of LABs/CLBs | — | 1,057 |
| Total RAM Bits | — | 920,448 |
| Number of User I/Os | — | 345 |
| Number of Gates | — | [DATA_NEEDED: total gate count] |
| Package Type | — | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch |
| Core Voltage | — | 1.5 V |
| Configuration Method | — | SRAM, JTAG, passive/active serial/parallel |
| MSL 等级 | — | [DATA_NEEDED: MSL moisture sensitivity level] |