EP1S10F672C6 vs EP1S10F672I7 对比
详细并排对比 EP1S10F672C6 出自 Intel 和 EP1S10F672I7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S10F672C6 | EP1S10F672I7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $72.00 | $124.75 |
| Series | Stratix® I | — |
| Family | Stratix FPGA | Stratix |
| Logic Elements (LE) | 10,570 | — |
| Logic Array Blocks (LABs) | 1057 | — |
| Total Memory Bits | 920,448 bits | — |
| Embedded Memory | TriMatrix (MRAM/M4K) | — |
| DSP Blocks | 6 | Yes (dedicated hardware multipliers) |
| Number of I/Os | 345 | — |
| Number of PLLs | 12 (6 per device side) | — |
| Core Voltage | 1.5 V | — |
| Process Technology | 130 nm CMOS | 0.13 um CMOS |
| 封装 | 672-ball FineLine BGA (FBGA) | FBGA-672, 35 x 35 mm, 1.27 mm pitch |
| 工作温度 | 0C to +85C (Commercial) | 0 C to +85 C (industrial grade, I7) |
| Maximum Core Frequency | 420.17 MHz | — |
| Configuration Modes | Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| 安装类型 | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | unknown - verify per lot |
| Logic Elements | — | 10,570 |
| User I/O Pins | — | 345 |
| Core Supply Voltage | — | 1.5 V |
| Maximum Internal Clock | — | 420.17 MHz (per datasheet) |
| Logic Family | — | CMOS |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Total Pins | — | 672 (FBGA) |
| Configuration Method | — | JTAG / serial / parallel PROM |
| 存储器类型 | — | TriMatrix embedded block RAM + distributed RAM |