EP1S10F780C5N vs EP1S10F780I6N 对比
详细并排对比 EP1S10F780C5N 出自 Intel 和 EP1S10F780I6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S10F780C5N | EP1S10F780I6N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $195.00 | $98.75 |
| Family | Stratix | Stratix |
| Logic Elements | 10570 | 10,570 |
| Total RAM Bits | 920448 | — |
| User I/O Count | 426 | — |
| Core Voltage | 1.5 V | — |
| 工作温度 | 0C to +85C (Commercial) | -40 °C to +100 °C (industrial) |
| 封装 | 780-ball FBGA (29 x 29 mm, 1 mm pitch) | 780-ball FineLine BGA, 29 x 29 mm, 1.0 mm pitch |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Internal Operating Frequency (max) | 500 MHz | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| DSP Blocks | 12 (per family datasheet) | 12 |
| PLLs | [DATA_NEEDED: PLL count] | 6 |
| Configuration Modes | Passive Serial, Active Serial, JTAG | Active Serial (AS), Passive Serial (PS), JTAG |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL, LVDS (per family datasheet) | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | Compliant (N suffix) | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | Yes | — |
| Speed Grade | C5 | -6 (6.0 ns core clock period) |
| Logic Array Blocks (LABs) | — | 1,057 |
| User I/Os | — | 426 |
| Embedded RAM (Total) | — | 920,448 bits |
| M512 Blocks | — | 94 (32 x 18 bits each) |
| M4K Blocks | — | 60 (128 x 36 bits each) |
| M-RAM Blocks | — | 1 (4 Kbit) |
| Clock Outputs | — | 16 |
| Transceiver Channels | — | 12 (not populated on I6 speed grade) |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage (VCCIO) | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (per bank) |
| MSL 等级 | — | 3 (168 hours) |
| Logic Family | — | CMOS |
| Supply Voltage Nominal | — | 1.5 V |