EP1S10F780I6N vs EP1S20F780I5N 对比
详细并排对比 EP1S10F780I6N 出自 Intel 和 EP1S20F780I5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S10F780I6N | EP1S20F780I5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $98.75 | $150.00 |
| Family | Stratix | — |
| Logic Elements | 10,570 | — |
| Logic Array Blocks (LABs) | 1,057 | — |
| User I/Os | 426 | — |
| Embedded RAM (Total) | 920,448 bits | — |
| M512 Blocks | 94 (32 x 18 bits each) | — |
| M4K Blocks | 60 (128 x 36 bits each) | — |
| M-RAM Blocks | 1 (4 Kbit) | — |
| PLLs | 6 | — |
| Clock Outputs | 16 | — |
| DSP Blocks | 12 | — |
| Transceiver Channels | 12 (not populated on I6 speed grade) | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | 1.5 V, 1.8 V, 2.5 V, 3.3 V (per bank) | — |
| Process Technology | 0.13 µm CMOS | 130 nm CMOS |
| 工作温度 | -40 °C to +100 °C (industrial) | -40C to +100C |
| Speed Grade | -6 (6.0 ns core clock period) | -I5 (industrial, medium speed) |
| 封装 | 780-ball FineLine BGA, 29 x 29 mm, 1.0 mm pitch | — |
| 安装类型 | Surface Mount | Surface Mount |
| MSL 等级 | 3 (168 hours) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Configuration Modes | Active Serial (AS), Passive Serial (PS), JTAG | — |
| Logic Family | CMOS | — |
| Supply Voltage Nominal | 1.5 V | — |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | Stratix |
| Device Family | — | EP1S20 |
| Logic Elements / Cells | — | 18,460 |
| Configurable Logic Blocks (CLBs) | — | 1,846 |
| Number of I/O Pins | — | 586 |
| Number of Logic Gates | — | [DATA_NEEDED: total gate count equivalent] |
| Number of RAM Bits | — | [DATA_NEEDED: total embedded RAM bits] |
| Number of Multipliers | — | [DATA_NEEDED: hardware multiplier count] |
| Voltage - Supply (Core) | — | 1.5 V nominal (1.425 V to 1.575 V) |
| 封装 / 外壳 | — | 780-BGA (FC-FBGA, 28x28 mm, 0.4 mm pitch) |
| Maximum Internal Clock Frequency | — | 500 MHz |
| Configuration Method | — | Passive Serial (PS), Fast Passive Parallel (FPP), JTAG |