EP1S20F672I7 vs EP1S20F672C6N 对比

详细并排对比 EP1S20F672I7 出自 Intel 和 EP1S20F672C6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EP1S20F672I7 EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera

EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera

EP1S20F672I7 ⚠ 最后一次采购
Intel
EP1S20F672C6N EP1S20F672C6N - Stratix FPGA 18,460 LE 672-BGA | Intel

EP1S20F672C6N - Stratix FPGA 18,460 LE 672-BGA | Intel

EP1S20F672C6N ⚠ 最后一次采购

规格对比

参数 EP1S20F672I7 EP1S20F672C6N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 最后采购期
库存状态 有库存 有库存
单价(USD) $199.50 $68.90
Family Stratix (first generation) Stratix
Logic Elements (LEs) 18,460 —
Maximum RAM Bits 1,669,248 —
DSP Blocks [DATA_NEEDED: exact DSP block count] —
Maximum User I/Os 426 —
Supply Voltage (VCCINT core) 1.5 V —
Logic Family CMOS CMOS
封装 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch 672-BBGA (FineLine BGA) 35 x 35 mm
工作温度 -40C to +85C (industrial grade, I7 suffix) 0 C to 85 C (commercial)
Configuration Modes Passive Serial, Passive Parallel, JTAG —
Number of Pins / Balls 672 —
安装类型 Surface Mount (BGA) Surface Mount
Clock Management PLLs [DATA_NEEDED: PLL count] —
RoHS 状态 unknown Compliant
Lead-Free / Finish SnPb (e0 per Partstack datasheet extract) —
MSL 等级 unknown —
Status Last Time Buy (per distributor notices) —
Logic Elements — 18,460
Total RAM Bits — 1,669,248
User I/O Count — 426
Package Pitch — 1.27 mm
Core Voltage — 1.5 V
Speed Grade — -6
Configuration Mode — PS, FPP, JTAG
Embedded DSP Blocks — Yes (36 x 36-bit multipliers)
TriMatrix Memory — M512, M4K, M-RAM blocks
PLLs — 12 (4 enhanced)
Global Clock Networks — 16
Lead Free — Yes

数据手册与资源

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