EP1S25F672C5N vs EP1S25F672C8N 对比

详细并排对比 EP1S25F672C5N 出自 Intel 和 EP1S25F672C8N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S25F672C5N EP1S25F672C8N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $142.00 $179.40
Family Stratix Stratix (EP1S)
Series EP1S25 —
Logic Elements (Cells) 25,660 —
Number of CLBs 2,566 —
Number of Logic Cells / Gates [DATA_NEEDED: total system gates] —
Process Technology 130 nm CMOS 130 nm CMOS
Maximum Internal Frequency 500 MHz 357.14 MHz
Core Supply Voltage 1.5 V (nominal) 1.5 V
Number of I/O Pins 473 user I/O —
Number of I/O Banks [DATA_NEEDED: I/O bank count] —
Package Type FineLine BGA (FBGA) 672-ball FineLine BGA (FBGA)
Package Pin Count 672 —
Ball Pitch 1.00 mm —
工作温度范围 0 °C to +85 °C (commercial) —
Speed Grade C5 C8 (-8)
Lead-Free (Pb-Free) Yes (suffix "N") —
Configuration Method SRAM-based, programmable via JTAG / Passive Serial / Fast Passive Parallel —
安装类型 Surface Mount (BGA) —
RoHS 状态 Compliant Compliant (lead-free N suffix)
Logic Elements (LE) — 25,660
Embedded Memory — 1,944 Kbit (TriMatrix)
DSP Blocks — 12 (9-bit x 9-bit multipliers)
PLLs — 6
Maximum User I/O — 426
工作温度 — 0 °C to 85 °C (commercial)
Package Dimensions — 35 x 35 mm, 1.27 mm pitch
Logic Family — CMOS
Configuration — Passive Serial / Passive Parallel / JTAG / EPC device
Origin — Altera (acquired by Intel, 2015)

数据手册与资源

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