EP1S25F780C5 vs EP1S25F780C5N 对比

详细并排对比 EP1S25F780C5 出自 Altera 和 EP1S25F780C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S25F780C5 EP1S25F780C5N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $1,249.50 $595.00
Family Stratix I Stratix
Logic Elements 25,660 25,660
Logic Array Blocks (LABs) 2,566 2,566
Total RAM Bits 1,944,576 —
Embedded Multipliers (DSP blocks) 80 (typical) —
User I/O Count 597 —
封装 780-FBGA (29x29 mm) 780-ball FBGA, 29 x 29 mm, 1.0 mm pitch
Core Voltage (VCCINT) 1.425 V to 1.575 V —
Speed Grade C5 —
Operating Temperature (TJ) 0 °C to +85 °C (commercial) —
Process Technology 0.13 µm CMOS, SRAM-based 130 nm CMOS
LVDS Performance Up to 7.6 Gbps (claim per family datasheet) —
PLLs Up to 8 per device 4
Global Clock Networks 14 —
安装类型 Surface Mount (SMT, BGA) Surface Mount (BGA)
RoHS 状态 Compliant per Altera product page [DATA_NEEDED: confirm per specific reel lot]
Maximum User I/O — 597
Core Supply Voltage — 1.5 V
工作温度 — 0 C to 85 C (Commercial Extended)
Embedded Memory — TriMatrix memory blocks, up to ~1.92 Mbits total
DSP Blocks — Dedicated multiplier/accumulator blocks
I/O Banks — 12
Maximum Frequency (internal) — up to 500 MHz logic, 420 MHz DSP
Supported I/O Standards — LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, PCI, PCI-X
Configuration Modes — Passive Serial, Passive Parallel Sync/Async, JTAG
MSL 等级 — [DATA_NEEDED: MSL rating per JEDEC J-STD-020]

数据手册与资源

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