EP1S25F780C5N vs EP1S25F780I6N 对比

详细并排对比 EP1S25F780C5N 出自 Intel 和 EP1S25F780I6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S25F780C5N EP1S25F780I6N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $595.00 $1,250.00
Family Stratix Stratix
Logic Elements 25,660 25,660
Logic Array Blocks (LABs) 2,566 2,566
Maximum User I/O 597 —
封装 780-ball FBGA, 29 x 29 mm, 1.0 mm pitch 780-BBGA (FineLine BGA, 29 x 29 mm, 1.0 mm pitch)
Process Technology 130 nm CMOS 130 nm CMOS
Core Supply Voltage 1.5 V —
工作温度 0 C to 85 C (Commercial Extended) 0C to 85C (industrial)
Embedded Memory TriMatrix memory blocks, up to ~1.92 Mbits total —
DSP Blocks Dedicated multiplier/accumulator blocks Yes (dedicated 9/18/36-bit multipliers)
PLLs 4 —
I/O Banks 12 —
Maximum Frequency (internal) up to 500 MHz logic, 420 MHz DSP —
Supported I/O Standards LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, PCI, PCI-X —
Configuration Modes Passive Serial, Passive Parallel Sync/Async, JTAG —
RoHS 状态 [DATA_NEEDED: confirm per specific reel lot] [DATA_NEEDED: rohs status]
安装类型 Surface Mount (BGA) Surface Mount (BGA)
MSL 等级 [DATA_NEEDED: MSL rating per JEDEC J-STD-020] 3 (per Partstack listing)
Total RAM Bits — 1,944,576
User I/O Pins — 597
Core Voltage — 1.5 V
Speed Grade — 6 (I6 - industrial)
Lead Free — Yes (per Ampheo listing)
Embedded PLL — Yes
LVDS Support — Yes (up to 840 Mbps per Altera datasheet family)
Configuration Mode — JTAG / Passive Serial / Fast Passive Parallel (per Stratix family)

数据手册与资源

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