EP1S25F780I6 vs EP1S25F780C5N 对比

详细并排对比 EP1S25F780I6 出自 Altera 和 EP1S25F780C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S25F780I6 EP1S25F780C5N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $162.00 $595.00
Family Stratix Stratix
Logic Elements (LE) 25,660 —
Logic Array Blocks (LAB) 2,566 —
Total RAM Bits 1,944,576 —
DSP Blocks 28 Dedicated multiplier/accumulator blocks
Embedded Multipliers 9-bit x 9-bit, in DSP blocks —
User I/O Count 597 —
封装 780-ball FBGA (FineLine BGA, 29 x 29 mm, 1 mm pitch) 780-ball FBGA, 29 x 29 mm, 1.0 mm pitch
Process Node 0.13 µm all-layer copper SRAM —
Core Voltage VCCINT 1.5 V typical —
工作温度 0 °C to +85 °C (Industrial, -I6 grade) 0 C to 85 C (Commercial Extended)
Configuration JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel —
Maximum Internal Frequency [DATA_NEEDED: internal fMAX per logic cell] —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: confirm per specific reel lot]
MSL 等级 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL rating per JEDEC J-STD-020]
Logic Elements — 25,660
Logic Array Blocks (LABs) — 2,566
Maximum User I/O — 597
Process Technology — 130 nm CMOS
Core Supply Voltage — 1.5 V
Embedded Memory — TriMatrix memory blocks, up to ~1.92 Mbits total
PLLs — 4
I/O Banks — 12
Maximum Frequency (internal) — up to 500 MHz logic, 420 MHz DSP
Supported I/O Standards — LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, PCI, PCI-X
Configuration Modes — Passive Serial, Passive Parallel Sync/Async, JTAG

数据手册与资源

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