EP1S25F780I6N vs EP1S25F780C5 对比

详细并排对比 EP1S25F780I6N 出自 Intel 和 EP1S25F780C5 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1S25F780I6N EP1S25F780C5
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $1,250.00 $1,249.50
Family Stratix Stratix I
Logic Elements 25,660 25,660
Logic Array Blocks (LABs) 2,566 2,566
Total RAM Bits 1,944,576 1,944,576
User I/O Pins 597 —
封装 780-BBGA (FineLine BGA, 29 x 29 mm, 1.0 mm pitch) 780-FBGA (29x29 mm)
Process Technology 130 nm CMOS 0.13 µm CMOS, SRAM-based
Core Voltage 1.5 V —
Speed Grade 6 (I6 - industrial) C5
工作温度 0C to 85C (industrial) —
安装类型 Surface Mount (BGA) Surface Mount (SMT, BGA)
MSL 等级 3 (per Partstack listing) —
Lead Free Yes (per Ampheo listing) —
RoHS 状态 [DATA_NEEDED: rohs status] Compliant per Altera product page
DSP Blocks Yes (dedicated 9/18/36-bit multipliers) —
Embedded PLL Yes —
LVDS Support Yes (up to 840 Mbps per Altera datasheet family) —
Configuration Mode JTAG / Passive Serial / Fast Passive Parallel (per Stratix family) —
Embedded Multipliers (DSP blocks) — 80 (typical)
User I/O Count — 597
Core Voltage (VCCINT) — 1.425 V to 1.575 V
Operating Temperature (TJ) — 0 °C to +85 °C (commercial)
LVDS Performance — Up to 7.6 Gbps (claim per family datasheet)
PLLs — Up to 8 per device
Global Clock Networks — 14

数据手册与资源

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