EP1S30B956C6 vs EP1S80B956C6AA 对比
详细并排对比 EP1S30B956C6 出自 Altera 和 EP1S80B956C6AA 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S30B956C6 | EP1S80B956C6AA |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $78.00 | $215.00 |
| Family | Stratix | Stratix |
| Logic Elements (LEs) | 32,470 | — |
| Logic Array Blocks (LABs) | 3,247 | — |
| Embedded Memory Bits | 3,317,184 (approximately 3.4 Mbit) | — |
| Maximum User I/O | 683 | — |
| Process Technology | 130 nm CMOS | — |
| Core Voltage (VCCINT) | 1.5 V | 1.5 V |
| 工作温度 | 0 C to 85 C (Commercial) | Commercial (0C to +85C) - inferred from C6 suffix |
| Speed Grade | C6 | C6 |
| 封装 | 956-ball FCBGA (BGA-956), 40 x 40 mm, 1.27 mm pitch | 956-BGA |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| Maximum Internal Frequency | 450.05 MHz (per family datasheet) | — |
| DSP Blocks | Yes (Stratix DSP blocks) | [DATA_NEEDED: DSP block count] |
| PLLs | Up to 12 | 6 |
| Configuration Modes | Passive Serial (PS), Passive Parallel (PP), JTAG | — |
| RoHS 状态 | Not confirmed - pre-RoHS part | Lead free / RoHS Compliant |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| Lead-Free | Unknown | — |
| Process Node | — | 130 nm |
| Logic Elements | — | 79,040 |
| M4K RAM Blocks | — | 742 |
| Total Embedded Memory | — | [DATA_NEEDED: total embedded memory bits] |
| User I/O Pins | — | 683 |
| I/O Voltage (VCCIO) | — | MultiVolt (1.5 V, 1.8 V, 2.5 V, 3.3 V) |
| Configuration Scheme | — | Active Serial / Passive Serial / JTAG |
| Legacy Status | — | Obsolete - Mult Device EOL 1/Jun/2017 |